Modern cryptographic systems are required to be programmable. Software based solutions for encryption are desirable for cost and ease of implementation; commercial off-the-shelf (COTS) processors would offer maximum modularity and re-programmability. Further, modern field programmable gate array (FPGA) technology often is implemented with a single hard core (generally multi-core) processor and a range of programmable gates for additional logic.
However, for high assurance systems, certifying authorities are distrustful of software only solutions. In existing implementations of software systems, plain text and cipher test are simultaneously hosted by the processor.
Consequently, it would be advantageous if an apparatus existed that is suitable for implementing a certifiable encryption system, with redundancies to obviate any single point of failure, with off-the-shelf processors.